1. Field of the Invention
The present invention relates to the management of virtual machines. More specifically, the present invention relates to management of the system resources in a virtual machine environment.
2. Background of the Related Art
Cache is a computer system component on which data can be stored on behalf of a storage device such as a DIMM or a hard disk drive, and from which data may be accessed faster than from the storage device. Cache generally has much less capacity than the corresponding storage device, and is therefore used to store data that is likely to be requested again, such as the more relevant or more recent data. Several different layers of cache may be provided in a modern computer system. Level 1 (or primary) cache, for example, is used to store data on behalf of system memory (which comprises random access memory, i.e. RAM) for access by a processor. Level 1 cache can be built directly into the processor and can run at the same speed as the processor, providing the fastest possible access time. Level 2 (or secondary) cache is also used to store a portion of system memory and may be included within a chip package, but is separate from the processor. Level 2 cache has greater capacity than Level 1 cache, but is slower. Some systems may even include Level 3 cache that has even greater capacity than Level 2 cache. However, Level 3 cache is typically slower than Level 2 cache, yet still faster than the primary storage device, and may be located off the chip package.
Cache storage is used to increase the software execution performance by keeping the more frequent instructions and memory accesses locally in higher speed memory normally located on the processor chip. Locally storing the more frequently used memory locations reduces the need to go off chip to access memory using a slower speed bus therefore increasing the overall processing performance of the system. Also, cache is a more expensive commodity in the system. A Level 1 cache is more expensive than a Level 2 cache and so on. It is therefore important to maximize the usage (cache hit ratio) for the most expensive cache levels.
Before reading or writing data to a given location in main memory, a processor will determine whether that memory location is in the cache. This is determined by comparing the address of the memory location to all tags in the cache that might contain that address. A “cache hit” occurs when the memory location is in the cache, and a “cache miss” occurs when the memory location is not in the cache. A cache hit allows the processor to immediately read or write the data in the identified cache line. A cache miss requires that the processor to read or write the data from or to the main memory. The proportion of memory accesses that result in a cache hit is referred to as the “cache hit ratio”, which is representative of the effectiveness of the cache for a particular program or process.